The present invention relates to clock gating systems, such as are used for supplying clock pulses at a controlled rate to a digital data processor, and particularly to clock gating systems controlled by flip-flop networks.
There are many applications in digital data processing systems wherein it is necessary to supply clock pulses at a controlled rate. For example, in testing a data processor, it is frequently necessary to provide a single clock pulse in order to test a specific operation thereof. The single clock pulse is supplied by what is called a single-shot circuit triggered by an actuator, such as a depressible push-button switch, to allow the passage of only one pulse from the normal clock input. Another application, also frequently used in testing data processing systems, requires the provision of a train of clock pulses at the normal clock rate until another actuator is actuated to inhibit the pulses. Such a system usually includes a further actuator which, when actuated, restores the transmission of the clock pulses from the normal clock input.
The control of the clock pulse supply is usually effected by manual means, particularly in manual testing of equipment. The control, however, may also be by automatic means, for example when a testing program specifies supplying a single shot clock to the system being tested, or terminating a train of clocks, when a particular condition is sensed, such as the comparison of two signal levels.
An object of the present invention is to provide a simple and improved clock pulse gating system which is capable of supplying a controlled rate of clock pulses as and when required. Another object is to provide an improved single shot clock circuit, and a further object is to provide an improved clock enable/inhibit circuit.